Rahnamaei, Ali, and Azadeh Kiani Sarkaleh. “High Performance Low Latency 16×16 Bit Booth Multiplier Using Novel 4-2 Compressor Structure”. Majlesi Journal of Electrical Engineering 14, no. 2 (June 1, 2020): 1-9. Accessed July 3, 2020. http://mjee.iaumajlesi.ac.ir/index/index.php/ee/article/view/3293.