A Novel CMOS Ripple Comparator Cell Using the Gate-Diffusion Input Technique

  • Azadeh Kiani
  • Fereshteh Pourahangaryan
  • Rahebeh NiarakiAsl
Keywords: Ripple Comparator, Propagation Delay, Low-Power, PDP, GDI.


In this paper a new implementation of CMOS ripple comparator cell using the Gate-Diffusion Input (GDI) technique is presented. The proposed design using this technique allows for the reduction of power consumption, propagation delay, and the area of digital circuits while maintaining low complexity of logical design. The performance comparison with standard CMOS and GDI logic design techniques is presented. These methods are compared with respect to the number of devices, PDP, and power dissipation. Simulation results confirm that the proposed cell can work at low supply voltage and dissipates low power.


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How to Cite
Kiani, A., Pourahangaryan, F., & NiarakiAsl, R. (2010). A Novel CMOS Ripple Comparator Cell Using the Gate-Diffusion Input Technique. Majlesi Journal of Electrical Engineering, 3(4), 66-71. https://doi.org/https://doi.org/10.1234/mjee.v3i4.127